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Board Support Tiers

What nano-ros promises for each in-tree board package, and why.

Every tier here is checked against evidence by just check board-tiers: a board cannot claim tier 1 or 2 without runtime cells in the test matrix, cannot claim tier 3 while holding runtime cells, and cannot be omitted from this table at all. That gate exists because the previous hand-written table drifted into claiming a license-gated target was CI-tested.

For procurement guidance on parts that have no crate in this tree (Nordic, NXP, TI and friends), see Supported Boards. That table is hand-maintained and covers hardware this one cannot describe; this table is generated and covers what is actually in the repo.

Tier 1 — supported

just ci exercises it, it has asserted runtime coverage, and a nightly lane builds it. A regression fails before merge.

Board packagePlatformMaintainersNotes
nros-board-linuxLinuxunassignedThe reference platform: the densest Runtime coverage of any target, all three RMWs. phase-337 W8.a merged the native shim and the posix family driver into this one crate — the registry carried TWO rows for one implementation because board_path_for mapped both keys to the same ZST.
nros-board-threadx-linuxThreadxLinuxunassigned
nros-board-zephyrZephyrNativeSimunassignedCAVEAT: only ever built for native_sim/native/64. No real Zephyr hardware board is built by anything.

Tier 2 — verified

Asserted runtime coverage and a nightly lane, but not in just ci. Breakage is found within a day.

Board packagePlatformMaintainersNotes
nros-board-freertos-posixFreertosPosixunassigned
nros-board-mps2-an385QemuBaremetalunassignedphase-337 W6.a folded nros-board-rtic-mps2-an385 in as the rtic feature — one crate, two entry shapes (direct-exec + RTIC), one witness row.
nros-board-mps2-an385-freertosFreertosMps2unassigned
nros-board-nuttx-qemuNuttxArmunassigned
nros-board-nuttx-qemuNuttxRiscvunassignedHONEST LABEL: C runtime-proven; Rust and C++ Pubsub are explicit CarveOuts and every EntryPubsub row is BuildOnly.
nros-board-threadx-qemu-riscv64ThreadxRiscv64unassignedAll three Action rows are BuildOnly by a deliberate wall-clock choice (182.5), not by breakage.
nros-board-zephyrZephyrQemuCortexMunassignedC, C++ and Rust pubsub are Runtime; service/action are BuildOnly pending the runner’s peer half. It also carries the tree’s first non-native_sim live-peer interop cell (phase-441 W1, zephyr-cortex-m-pubsub-c-zenoh). This note used to say NO RUST ROW, because zephyr-lang-rust could not compile for any board whose devicetree has gpio nodes — issue 0432, RESOLVED 2026-08-12 by phase-346 W2/W3, after which the Rust leaf built and zephyr_cortex_m_rust_zenoh_pubsub_e2e ran it while four documents still said it could not. Tier 2 rather than 1 because just ci is host-only and this needs QEMU.

Tier 3 — build-only

Compiles. No CI lane can boot it — real hardware or a license-gated model is required. Nobody has booted it recently unless a maintainer did so by hand.

Board packagePlatformMaintainersNotes
nros-board-s32z270-freertos—unassignedS32Z270 RTU Cortex-R52 (ASI phase-4 W5.b consumer). No matrix_platform: no witness exists for this board, and borrowing FreertosMps2’s would claim its Runtime cells. Link-completeness is proven by the workspace cmake lane with the CRx_No_GIC default port.
nros-board-zephyrFvpunassignedRuntime is maintainer-run via just zephyr verify-fvp-runtime — hence execution_class = \"hardware\", which is what exempts this row from phase-375 W4’s smoke floor. The model is NOT licence-gated (that claim stood here until 2026-09-06 and was wrong): nros setup --tool arm-fvp fetches it from a pinned Arm CDN permalink, and the board-import fixture was verified booting on it (nros: smoke ok) the same day. What still keeps CI out is cost and x86_64-only hosting, not permission. Kept in-tree: it is the ASI reference consumer’s target (phase-292), a real downstream user the CI evidence cannot see. phase-337 W9.a folded the nros-board-fvp-aemv8r-smp CRATE into nros-board-zephyr/boards/fvp-aemv8r-smp/ — the crate’s Rust half (a Config and a run loop) had zero consumers, so what it actually shipped was a prj.conf, a DTS overlay and a board.cmake: a config bundle wearing a Cargo.toml. Third row for this crate, which is exactly what W1.c’s (crate, matrix_platform) keying is for.

Scaffold — not supported

Structurally incomplete. Distinct from tier 3: tier 3 is finished-but-unverified, scaffold is unfinished. Do not build on these.

Board packagePlatformMaintainersNotes
nros-board-esp32-qemuEsp32QemuunassignedDORMANT (issue 1525): code kept for future use; no lane builds or tests it. Was tier 2 (two-way QEMU e2e, esp32_emulator.rs, now #[ignore]d).
nros-board-mps2-an385-zephyr—unassigned
nros-board-mps3-an536-freertos—unassigned
nros-board-qemu-cortex-a53—unassigned

Infrastructure — not boards

Shared traits, family drivers, ABI mirrors, PACs, and descriptor directories. No platform, no tier promise.

Board packagePlatformMaintainersNotes
linux—unassignednros-board.toml descriptor directory, not a crate (renamed from posix by phase-337 W8.d). phase-321 W2 moves these out of packages/boards/.
mps2-an385-pac—unassignedIRQ enum only. Kept because RTIC’s #[rtic::app(device = ...)] needs a nameable path.
nros-board-cffi—unassignedHeader ABI mirror with ZERO in-tree C consumers; kept alive by its own drift gate. Spec artifact, not a library.
nros-board-common—unassignedBuild-helper library plus one trait; 2180 of 2252 code lines are behind build-helpers.
nros-board-freertos—unassignedReal family driver: the MPS2 overlay is pub use nros_board_freertos::Config and carries zero config code. The pattern the forked boards should copy.
nros-board-nuttx—unassignedNuttX FAMILY DRIVER, not a façade: owns run_entry / run_tiers / the tier spin loops, which the one board overlay (nros-board-nuttx-qemu) delegates to. phase-337 W3 merged the two board crates below it; this layer stays.
nros-board-threadx—unassignedReal family driver: a 1120-line generic entry.py both ThreadX boards call into.
nros-board-threadx-port-riscv64—unassignedNOT a board: RFC-0064 layer 2, the ThreadX RISC-V64/GNU ARCH PORT. Upstream types ULONG as 8 bytes there; NetX Duo’s packet code does ULONG * arithmetic assuming 4, and retyping it shifts every TX_THREAD offset the context-switch assembly loads — so the fork is a header plus five .S files, and it is arch, not board. Extracted from nros-board-threadx-qemu-riscv64 by phase-337 W4.a; a second riscv64 ThreadX board would need every line of it unchanged. threadx-linux has none because upstream’s Linux port already types ULONG as 4 bytes — which is why the two ThreadX boards did NOT merge.
zephyr—unassignednros-board.toml descriptor directory, not a crate.

Maintainers

A tier is a promise, and just check board-tiers requires someone to have made it: tier 1 needs 3 named maintainers, tier 2 needs 2, tier 3 needs 1 (phase-375 W1). Rust’s target-tier policy is the model — a named person per target, and demotion when the maintainer becomes unreachable; that mechanism, not the directory layout, is what actually retires abandoned targets.

Rows that predate the rule are grandfathered by scripts/board-maintainer-baseline.json, a list that only shrinks. So the rule binds a NEW board immediately and an existing one as its owner is found — a gate that failed all 22 rows on the day it landed would have been bypassed instead. Recording an owner is the point; inventing one would be worse than leaving the row at the tier it can carry.