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Supported Boards

Procurement-grade compatibility matrix. Each row lists a real vendor + board model and reports nano-ros’s status on it. Rows marked Tested boot in CI; Ready rows compile and run but have no in-CI gate yet; Untested rows compile per the architecture support but no one has reported booting nano-ros on them.

VendorBoardMCU / SoCArchDefault RTOSStatusExample / board crate
ARMMPS2-AN385 (QEMU)Cortex-M3Armv7-MFreeRTOS / bareTestedexamples/qemu-arm-freertos/, examples/qemu-arm-baremetal/
STMicroSTM32F4-DiscoverySTM32F407Cortex-M4FFreeRTOS / bareTestedpackages/boards/nros-board-stm32f4/
STMicroSTM32H7-NucleoSTM32H743Cortex-M7FFreeRTOS / ZephyrReadyUse FreeRTOS / Zephyr starter with nros-board-freertos overlay
STMicroPixhawk 4 (FMUv5)STM32F765Cortex-M7FNuttX (PX4)Readyintegrations/px4/module-template/
STMicroPixhawk 6X / 6CSTM32H753Cortex-M7FNuttX (PX4)Readyintegrations/px4/module-template/
NordicnRF52840-DKCortex-M4FArmv7E-MZephyrUntestedZephyr starter — supply -b nrf52840dk_nrf52840
NordicnRF5340-DKCortex-M33 (dual)Armv8-MZephyrUntestedZephyr starter — supply -b nrf5340dk_nrf5340_cpuapp
EspressifESP32-C3-DevKitRISC-V (RV32IMC)RISC-Vbare / ESP-IDFTestedexamples/qemu-esp32-baremetal/rust/, integrations/nano-ros/
EspressifESP32-C6-DevKitRISC-VRISC-VESP-IDFUntestedSame ESP-IDF path as C3
NXPLPC55S69-EVKCortex-M33Armv8-MZephyrUntestedZephyr -b lpcxpresso55s69_cpu0
NXPMIMXRT1170-EVKCortex-M7 + M4Armv7-MFreeRTOS / ZephyrUntestedFreeRTOS starter + vendor BSP
TILP-CC1352P7Cortex-M4FArmv7E-MFreeRTOS / TI-RTOSUntestedFreeRTOS starter + TI driver overlay
RP2040Raspberry Pi PicoCortex-M0+Armv6-Mbare / FreeRTOSUntestedBare-metal Cortex-M3 path — Cortex-M0+ has only 4 NVIC priority levels (per-callback OS-priority dispatch is disqualified — pub/sub still works fine)
QEMUvirt RISC-V64rv64gcRISC-VThreadXTestedexamples/threadx-riscv64/
QEMUCortex-A9 (Versatile)Cortex-A9Armv7-AZephyr / NuttXTestedZephyr -b qemu_cortex_a9, NuttX qemu-armv7a
Arm FVPBase_RevC AEMv8R (SMP)Cortex-A SMPArmv8-RZephyr 3.7Tested (build); license-gated runtimeSee ARM FVP getting-started chapter; just zephyr build-fvp-aemv8r{,-cyclonedds} + run-fvp-aemv8r{,-cyclonedds}
Linux host(sim)x86-64 / aarch64x86 / ArmThreadX simTestedexamples/threadx-linux/
Linux host(native)x86-64 / aarch64x86 / ArmPOSIXTestedexamples/native/

How to add a new board

  1. Pick the matching RTOS path. Cortex-M3 / M4 / M7 + RTOS → use FreeRTOS or Zephyr starter. Cortex-M0+ → bare-metal starter (limited; no NVIC priority headroom). Cortex-A / RISC-V64 → NuttX or Zephyr. Xtensa / RISC-V32 + Wi-Fi → ESP-IDF or esp-hal.
  2. Find or write a board crate. Existing crates under packages/boards/nros-board-*/ cover most QEMU + reference dev kits. Real-hardware boards need a thin board crate that supplies startup, linker script, and BoardIdle::wfi() (bare-metal) or wraps the RTOS’s BSP (FreeRTOS / Zephyr).
  3. Run the existing example tree. Each row above points at the canonical example dir. Cross-compile the talker / listener and verify against stock ROS 2 + RMW_IMPLEMENTATION=rmw_zenoh_cpp.
  4. Report back. Open an issue with the working build + flash + run commands so the row moves from Untested / Ready to Tested.

Caveats by chip family

  • Cortex-M0+ (RP2040, STM32F0, nRF51): only 4 NVIC priority levels. Per-callback OS-priority dispatch (a research scheduler shape originally proposed by Choi et al. as PiCAS, RTAS ’21) is disqualified on this class; nano-ros’s user-space EDF / FIFO scheduler is the only option. Pub/sub works fine.
  • Xtensa ESP32 / ESP32-S2 / ESP32-S3: needs the esp-rs fork of rustc (rustup target add does not cover Xtensa; install via https://github.com/esp-rs/rust-build).
  • Cortex-A9 / A53: hosted-RTOS only (NuttX, Zephyr). Heap + libc required; bare-metal Cortex-A is not in the coverage matrix.
  • PX4 boards: NuttX is the underlying kernel; the PX4 module template is the canonical entry path — see PX4 Autopilot.

See also